PCI Express, or PCIe, (formerly known as 3GIO for 3rd Generation I/O, not to be mistaken for PCI-X or PXI) is an implementation of the PCI computer bus that uses existing PCI programming concepts, but bases it on a completely different and much faster serial physical-layer communications protocol. The physical-layer consists not of a bus, but of a network of serial interconnects (because synchronization of parallel connections is hindered by timing skew) much like twisted pair ethernet. A single hub with a lot of pins on the mainboard is used, allowing all kinds of switching and parallelism.
It is supported primarily by Intel, who started working on the standard as the Arapahoe project after pulling out of the InfiniBand system.
PCI Express is intended to be used as a local interconnect only. As it is based on the existing PCI system, cards and systems can be converted to PCI Express by changing the physical layer only – existing systems could be adapted to PCI Express without any change in software. The higher speeds on PCI Express allow it to replace almost all existing internal buses, including AGP and PCI, and Intel envisions a single PCI Express controller talking to all external devices, as opposed to the northbridge/southbridge solution in current machines.
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